1. Field of Invention
The present invention relates to a circuit carrier. More particularly, the present invention relates to a circuit carrier having a solder mask layer with a stepped opening.
2. Description of Related Art
The flip chip interconnect technology for connecting bare dies (chips) to the carrier substrate can be summarized as follows. A plurality of pads are arranged on the active surface of the chip (die) in arrays and bumps are formed on the pads with the under bump metallurgy layer therebetween. The chip is facedown bonded (flipped) to be contact with the carrier substrate or the printed circuit board (PCB) via solder bumps. Since the flip chip technology has the advantages of achieving the high density of minimizing the package region and shortening the signal transmission path, the flip chip technology has been widely applied to high pin count chip packages.
FIG. 1A is a cross-sectional view illustrating a conventional circuit carrier before connecting the pre-solder paste and the bump. Referring to the FIG. 1, a circuit carrier 100 including a substrate 110, at least a contact pad 120, a solder mask layer 130 and a pre-solder paste 150, is provided. The contact pads 120 are connected to at least a bump 12 on the chip 10. The solder mask layer 130 is formed over the substrate 110. The solder mask layer 130 includes an opening 132. The opening 132 exposes the contact pad 120 and accommodates the pre-solder paste 150. The opening 132 has a size D1.
FIG. 1B is a schematic cross-sectional view illustrating a conventional circuit carrier after connecting the pre-solder paste and the bump. After the chip 10 is arranged onto the carrier 100, a reflow process is performed and the pre-solder paste 150 is melted during the reflow process. Thus, bumps 12 are attached to the contact pads 120.
The connection strength between the bump and the contact pad is critical for the reliability of the package structure and the yield of assembly. Since the volume of the solder paste is closely related to the connection strength, it is desirable to enlarge the opening of the solder mask layer for more solder paste. However, larger the opening becomes, larger the contact pad becomes. Since larger contact pads will occupy more area, the wire density or trace routing density of the substrate has to be reduced.
In fact, as the integration of the package assembly keeps increasing and the bump pitch keeps decreasing, the corresponding contact pads and openings of the solder mask layer need to be smaller. For those smaller contact pads, the current density is increased and electro-migration (EM) is increased. With elevated electro-migration, tin in the bumps easily reacts with copper in the contact pads to produce inter-metallic compounds in the interface. Because these inter-metallic compounds are fragile, the connection strength between the bumps and the contact pads is greatly deteriorated, which often leads to disconnection. Furthermore, electro-migration can even result in shorts.